april 2012 ?2012 fairchild semiconductor corporation fdmc8884 rev.e3 www.fairchildsemi.com 1 fdmc8884 n-channel power trench ? mosfet fdmc8884 n-channel power trench ? mosfet 30 v, 15 a, 19 m features ? max r ds(on) = 19 m at v gs = 10 v, i d = 9.0 a ? max r ds(on) = 30 m at v gs = 4.5 v, i d = 7.2 a ? high performance technology for extremely low r ds(on) ? termination is lead-free and rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced power trench ? process that has been especially tailored to mini mize the on-state resistance. this device is well suited for power management and load switching applications common in notebook computers and portable battery packs. application ? high side in dc - dc buck converters ? notebook battery power management ? load switch in notebook mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 30 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c 15 a -continuous (silicon limited) t c = 25 c 24 -continuous t a = 25 c (note 1a) 9.0 -pulsed 40 e as single pulse avalanche energy (note 3) 24 mj p d power dissipation t c = 25 c 18 w power dissipation t a = 25 c (note 1a) 2.3 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case 6.6 c/w r ja thermal resistance, junction to ambient (note 1a) 53 device marking device package reel size tape width quantity fdmc8884 fdmc8884 mlp 3.3x3.3 13 ?? 12 mm 3000 units bottom d d d d s s s g top pin 1 mlp 3.3x3.3 g s s s d d d d 5 6 7 8 3 2 1 4
fdmc8884 n-channel power trench ? mosfet www.fairchildsemi.com 2 ?2012 fairchild semiconductor corporation fdmc8884 rev.e3 electrical characteristics t j = 25 c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0 v 30 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 22 mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 p a t j = 125 c 250 i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 1.4 1.9 2.5 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c -6 mv/ c r ds(on) static drain to source on resistance v gs = 10 v, i d = 9.0 a 16 19 m : v gs = 4.5 v, i d = 7.2 a 22 30 v gs = 10 v, i d = 9.0 a, t j = 125 c 22 30 g fs forward transconductance v dd = 5 v, i d = 9.0 a 24 s dynamic characteristics c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1 mhz 513 685 pf c oss output capacitance 110 150 pf c rss reverse transfer capacitance 76 115 pf r g gate resistance 1.4 2.1 : switching characteristics t d(on) turn-on delay time v dd = 15 v, i d = 9.0 a, v gs = 10 v, r gen = 6 : 6 12 ns t r rise time 2 10 ns t d(off) turn-off delay time 15 27 ns t f fall time 2 10 ns q g(tot) total gate charge v gs = 0 v to 10 v v dd = 15 v i d = 9.0 a 10 14 nc total gate charge v gs = 0 v to 4.5 v 5.0 7.0 nc q gs total gate charge 1.8 nc q gd gate to drain ?miller? charge 2.2 nc drain-source diod e characteristics v sd source to drain diode forward voltage v gs = 0 v, i s = 9.0 a (note 2) 0.86 1.2 v v gs = 0 v, i s = 1.6 a (note 2) 0.76 1.2 t rr reverse recovery time i f = 9.0 a, di/dt = 100 a/ p s 13 18 ns q rr reverse recovery charge 3 10 nc notes: 1. r t ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 300 p s, duty cycle < 2.0 %. 3. e as of 24 mj is based on starting t j = 25 c, l = 1 mh, i as = 7 a, v dd = 30 v, v gs = 10 v. 100% test at l = 3 mh, i as = 4 a . a. 53 c/w when mounted on a 1 in 2 pad of 2 oz copper b.125 c/w when mounted on a minimum pad of 2 oz copper g df ds sf ss g df ds sf ss
fdmc8884 n-channel power trench ? mosfet www.fairchildsemi.com 3 ?2012 fairchild semiconductor corporation fdmc8884 rev.e3 typical characteristics t j = 25 c unless otherwise noted figure 1. 0123 0 10 20 30 40 v gs = 6 v v gs = 3.5 v v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 4 v v gs = 3 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0 10203040 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v gs = 6 v v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4 v v gs = 4.5 v v gs = 3 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 9.0 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 10 20 30 40 50 60 70 80 t j = 125 o c i d = 9.0 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 12345 0 10 20 30 40 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.00.20.40.60.81.01.21.4 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
fdmc8884 n-channel power trench ? mosfet www.fairchildsemi.com 4 ?2012 fairchild semiconductor corporation fdmc8884 rev.e3 figure 7. 03691 2 0 2 4 6 8 10 i d = 9.0 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15v gate charge characteristics figure 8. 0.1 1 10 100 1000 50 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 30 c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 1 10 20 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 10 20 30 v gs = 4.5 v limited by package r t jc = 6.6 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n c u r r e n t v s c a s e t e m p e r a t u r e figure 11. 0.01 0.1 1 10 100 0.01 0.1 1 10 100 10 s 1 s dc 100 ms 10 ms 1 ms 100 us i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t a = 25 o c fo rw ard bi as safe operating area figure 12. 10 -4 10 -3 10 -2 10 -1 110 100 1000 1 10 100 1000 single pulse r t ja = 125 o c/w t a = 25 o c 0.5 v gs = 10v p ( pk ) , peak transient power (w) t, pulse width (s) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25 c unless otherwise noted
fdmc8884 n-channel power trench ? mosfet www.fairchildsemi.com 5 ?2012 fairchild semiconductor corporation fdmc8884 rev.e3 figure 13. transient thermal response curve 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.001 0.01 0.1 1 single pulse r t ja = 125 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
fdmc8884 n-channel power trench ? mosfet www.fairchildsemi.com 6 ?2012 fairchild semiconductor corporation fdmc8884 rev.e3 dimensional outline and pad layout
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